IoT & Hardware2025completed

NanoProcessor

A digital hardware design project: a 14-bit custom processor implemented in VHDL on Xilinx Vivado and targeted to FPGA. The instruction set covers logical ops (AND, OR, XOR, NOT), arithmetic with overflow detection, and shift/rotate. Flag registers and LED indicators support real-time debugging on the board without a conventional software debugger.

VHDLVivadoFPGAISA
2017

Year

0

Features

0

Technologies

Problem
  • Fitting a useful ISA into a compact instruction encoding
  • Meeting timing and debugging without software-style breakpoints
Solution
  • State-machine control with a balanced instruction mix
  • LED and flag indicators as the primary on-hardware debug surface

Key Features

14-bit custom processor with encoded instruction set

Logical, arithmetic, shift, and rotate operations

Overflow / status flag register

LED-based real-time debugging on FPGA

Technologies

VHDLXilinx VivadoFPGADigital Logic

Learnings

  • Wrote synthesizable VHDL for datapath and control

  • Designed a compact ISA covering logical, arithmetic, and shift/rotate ops

  • Debugged timing and behavior on FPGA using LED and flag feedback

Highlights

14-bit ISA

FPGA Debug LEDs

Vivado Flow